/*
    ChibiOS - Copyright (C) 2006..2020 Giovanni Di Sirio

    Licensed under the Apache License, Version 2.0 (the "License");
    you may not use this file except in compliance with the License.
    You may obtain a copy of the License at

        http://www.apache.org/licenses/LICENSE-2.0

    Unless required by applicable law or agreed to in writing, software
    distributed under the License is distributed on an "AS IS" BASIS,
    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
    See the License for the specific language governing permissions and
    limitations under the License.
*/

// clang-format off

#ifndef BOARD_H
#define BOARD_H

/*===========================================================================*/
/* Driver constants.                                                         */
/*===========================================================================*/

/*
 * Board identifier.
 */
#define BOARD_ST_F401CC_JBC_CONTROLLER
#define BOARD_NAME "STM32 JBC CONTROLLER"

/*
 * Board oscillators-related settings.
 */
#if !defined(STM32_LSECLK)
#define STM32_LSECLK                32768U
#endif

#if !defined(STM32_HSECLK)
#define STM32_HSECLK                8000000U
#endif

/*
 * Board voltages.
 * Required for performance limits calculation.
 */
#define STM32_VDD                   330U

/*
 * I/O ports initial setup, this configuration is established soon after reset
 * in the initialization code.
 * Please refer to the STM32 Reference Manual for details.
 */
#define PIN_MODE_INPUT(n)           (0U << ((n) * 2U))
#define PIN_MODE_OUTPUT(n)          (1U << ((n) * 2U))
#define PIN_MODE_ALTERNATE(n)       (2U << ((n) * 2U))
#define PIN_MODE_ANALOG(n)          (3U << ((n) * 2U))
#define PIN_ODR_LOW(n)              (0U << (n))
#define PIN_ODR_HIGH(n)             (1U << (n))
#define PIN_OTYPE_PUSHPULL(n)       (0U << (n))
#define PIN_OTYPE_OPENDRAIN(n)      (1U << (n))
#define PIN_OSPEED_VERYLOW(n)       (0U << ((n) * 2U))
#define PIN_OSPEED_LOW(n)           (1U << ((n) * 2U))
#define PIN_OSPEED_MEDIUM(n)        (2U << ((n) * 2U))
#define PIN_OSPEED_HIGH(n)          (3U << ((n) * 2U))
#define PIN_PUPDR_FLOATING(n)       (0U << ((n) * 2U))
#define PIN_PUPDR_PULLUP(n)         (1U << ((n) * 2U))
#define PIN_PUPDR_PULLDOWN(n)       (2U << ((n) * 2U))
#define PIN_AFIO_AF(n, v)           ((v) << (((n) % 8U) * 4U))

/* Generated by mx2board.py */

#define CCR_BL_GREEN CCR3
#define CCR_BL_RED CCR3
#define CCR_PWM1 CCR1
#define CCR_PWM2 CCR1
#define CCR_PWM3 CCR1
#define CHN_BL_GREEN 1
#define CHN_BL_RED 0
#define CHN_PWM1 0
#define CHN_PWM2 1
#define CHN_PWM3 2
#define I2C_I2C1_SCL 1
#define I2C_I2C1_SDA 1
#define ICUD_BL_GREEN ICUD3
#define ICUD_BL_RED ICUD3
#define ICUD_PWM1 ICUD1
#define ICUD_PWM2 ICUD1
#define ICUD_PWM3 ICUD1
#define LINE_BARCODE_RX PAL_LINE(GPIOB, 7U)
#define LINE_BARCODE_TX PAL_LINE(GPIOB, 6U)
#define LINE_BL_GREEN PAL_LINE(GPIOB, 5U)
#define LINE_BL_RED PAL_LINE(GPIOB, 4U)
#define LINE_BT_RX PAL_LINE(GPIOA, 12U)
#define LINE_BT_TX PAL_LINE(GPIOA, 11U)
#define LINE_BUZ PAL_LINE(GPIOA, 15U)
#define LINE_DISP_A0_DAT PAL_LINE(GPIOC, 14U)
#define LINE_DISP_CS PAL_LINE(GPIOC, 13U)
#define LINE_DISP_RESET PAL_LINE(GPIOC, 15U)
#define LINE_FP_RESERVED PAL_LINE(GPIOB, 10U)
#define LINE_HNDL_SEN1 PAL_LINE(GPIOA, 0U)
#define LINE_HNDL_SEN2 PAL_LINE(GPIOA, 3U)
#define LINE_HNDL_SEN3 PAL_LINE(GPIOA, 6U)
#define LINE_I2C1_SCL PAL_LINE(GPIOB, 8U)
#define LINE_I2C1_SDA PAL_LINE(GPIOB, 9U)
#define LINE_KEY_POLL PAL_LINE(GPIOB, 2U)
#define LINE_PWM1 PAL_LINE(GPIOA, 8U)
#define LINE_PWM2 PAL_LINE(GPIOA, 9U)
#define LINE_PWM3 PAL_LINE(GPIOA, 10U)
#define LINE_PWM_EN PAL_LINE(GPIOB, 1U)
#define LINE_RCC_OSC_IN PAL_LINE(GPIOH, 0U)
#define LINE_RCC_OSC_OUT PAL_LINE(GPIOH, 1U)
#define LINE_SER_CLK PAL_LINE(GPIOB, 12U)
#define LINE_SLEEP_SEN1 PAL_LINE(GPIOB, 13U)
#define LINE_SLEEP_SEN2 PAL_LINE(GPIOB, 14U)
#define LINE_SLEEP_SEN3 PAL_LINE(GPIOB, 15U)
#define LINE_SYS_JTCK_SWCLK PAL_LINE(GPIOA, 14U)
#define LINE_SYS_JTDO_SWO PAL_LINE(GPIOB, 3U)
#define LINE_SYS_JTMS_SWDIO PAL_LINE(GPIOA, 13U)
#define LINE_TC1 PAL_LINE(GPIOA, 1U)
#define LINE_TC2 PAL_LINE(GPIOA, 4U)
#define LINE_TC3 PAL_LINE(GPIOA, 7U)
#define LINE_VIN1 PAL_LINE(GPIOA, 2U)
#define LINE_VIN2 PAL_LINE(GPIOA, 5U)
#define LINE_VIN3 PAL_LINE(GPIOB, 0U)
#define PAD_BARCODE_RX 7
#define PAD_BARCODE_TX 6
#define PAD_BL_GREEN 5
#define PAD_BL_RED 4
#define PAD_BT_RX 12
#define PAD_BT_TX 11
#define PAD_BUZ 15
#define PAD_DISP_A0_DAT 14
#define PAD_DISP_CS 13
#define PAD_DISP_RESET 15
#define PAD_FP_RESERVED 10
#define PAD_HNDL_SEN1 0
#define PAD_HNDL_SEN2 3
#define PAD_HNDL_SEN3 6
#define PAD_I2C1_SCL 8
#define PAD_I2C1_SDA 9
#define PAD_KEY_POLL 2
#define PAD_PWM1 8
#define PAD_PWM2 9
#define PAD_PWM3 10
#define PAD_PWM_EN 1
#define PAD_RCC_OSC_IN 0
#define PAD_RCC_OSC_OUT 1
#define PAD_SER_CLK 12
#define PAD_SLEEP_SEN1 13
#define PAD_SLEEP_SEN2 14
#define PAD_SLEEP_SEN3 15
#define PAD_SYS_JTCK_SWCLK 14
#define PAD_SYS_JTDO_SWO 3
#define PAD_SYS_JTMS_SWDIO 13
#define PAD_TC1 1
#define PAD_TC2 4
#define PAD_TC3 7
#define PAD_VIN1 2
#define PAD_VIN2 5
#define PAD_VIN3 0
#define PORT_BARCODE_RX GPIOB
#define PORT_BARCODE_TX GPIOB
#define PORT_BL_GREEN GPIOB
#define PORT_BL_RED GPIOB
#define PORT_BT_RX GPIOA
#define PORT_BT_TX GPIOA
#define PORT_BUZ GPIOA
#define PORT_DISP_A0_DAT GPIOC
#define PORT_DISP_CS GPIOC
#define PORT_DISP_RESET GPIOC
#define PORT_FP_RESERVED GPIOB
#define PORT_HNDL_SEN1 GPIOA
#define PORT_HNDL_SEN2 GPIOA
#define PORT_HNDL_SEN3 GPIOA
#define PORT_I2C1_SCL GPIOB
#define PORT_I2C1_SDA GPIOB
#define PORT_KEY_POLL GPIOB
#define PORT_PWM1 GPIOA
#define PORT_PWM2 GPIOA
#define PORT_PWM3 GPIOA
#define PORT_PWM_EN GPIOB
#define PORT_RCC_OSC_IN GPIOH
#define PORT_RCC_OSC_OUT GPIOH
#define PORT_SER_CLK GPIOB
#define PORT_SLEEP_SEN1 GPIOB
#define PORT_SLEEP_SEN2 GPIOB
#define PORT_SLEEP_SEN3 GPIOB
#define PORT_SYS_JTCK_SWCLK GPIOA
#define PORT_SYS_JTDO_SWO GPIOB
#define PORT_SYS_JTMS_SWDIO GPIOA
#define PORT_TC1 GPIOA
#define PORT_TC2 GPIOA
#define PORT_TC3 GPIOA
#define PORT_VIN1 GPIOA
#define PORT_VIN2 GPIOA
#define PORT_VIN3 GPIOB
#define PWMD_BL_GREEN PWMD3
#define PWMD_BL_RED PWMD3
#define PWMD_PWM1 PWMD1
#define PWMD_PWM2 PWMD1
#define PWMD_PWM3 PWMD1
#define TIM_BL_GREEN 3
#define TIM_BL_RED 3
#define TIM_PWM1 1
#define TIM_PWM2 1
#define TIM_PWM3 1
#define USART_BARCODE_RX 1
#define USART_BARCODE_TX 1
#define USART_BT_RX 6
#define USART_BT_TX 6


/* PORT A */
#define VAL_GPIOA_MODER ( \
    PIN_MODE_ANALOG(0) | \
    PIN_MODE_ANALOG(1) | \
    PIN_MODE_ANALOG(2) | \
    PIN_MODE_ANALOG(3) | \
    PIN_MODE_ANALOG(4) | \
    PIN_MODE_ANALOG(5) | \
    PIN_MODE_ANALOG(6) | \
    PIN_MODE_ANALOG(7) | \
    PIN_MODE_ALTERNATE(8) | \
    PIN_MODE_ALTERNATE(9) | \
    PIN_MODE_ALTERNATE(10) | \
    PIN_MODE_ALTERNATE(11) | \
    PIN_MODE_ALTERNATE(12) | \
    PIN_MODE_ALTERNATE(13) | \
    PIN_MODE_ALTERNATE(14) | \
    PIN_MODE_ALTERNATE(15) | \
    0)

#define VAL_GPIOA_OTYPER ( \
    PIN_OTYPE_PUSHPULL(0) | \
    PIN_OTYPE_PUSHPULL(1) | \
    PIN_OTYPE_PUSHPULL(2) | \
    PIN_OTYPE_PUSHPULL(3) | \
    PIN_OTYPE_PUSHPULL(4) | \
    PIN_OTYPE_PUSHPULL(5) | \
    PIN_OTYPE_PUSHPULL(6) | \
    PIN_OTYPE_PUSHPULL(7) | \
    PIN_OTYPE_PUSHPULL(8) | \
    PIN_OTYPE_PUSHPULL(9) | \
    PIN_OTYPE_PUSHPULL(10) | \
    PIN_OTYPE_PUSHPULL(11) | \
    PIN_OTYPE_PUSHPULL(12) | \
    PIN_OTYPE_PUSHPULL(13) | \
    PIN_OTYPE_PUSHPULL(14) | \
    PIN_OTYPE_PUSHPULL(15) | \
    0)

#define VAL_GPIOA_OSPEEDR ( \
    PIN_OSPEED_VERYLOW(0) | \
    PIN_OSPEED_VERYLOW(1) | \
    PIN_OSPEED_VERYLOW(2) | \
    PIN_OSPEED_VERYLOW(3) | \
    PIN_OSPEED_VERYLOW(4) | \
    PIN_OSPEED_VERYLOW(5) | \
    PIN_OSPEED_VERYLOW(6) | \
    PIN_OSPEED_VERYLOW(7) | \
    PIN_OSPEED_MEDIUM(8) | \
    PIN_OSPEED_MEDIUM(9) | \
    PIN_OSPEED_MEDIUM(10) | \
    PIN_OSPEED_MEDIUM(11) | \
    PIN_OSPEED_MEDIUM(12) | \
    PIN_OSPEED_MEDIUM(13) | \
    PIN_OSPEED_MEDIUM(14) | \
    PIN_OSPEED_MEDIUM(15) | \
    0)

#define VAL_GPIOA_PUPDR ( \
    PIN_PUPDR_FLOATING(0) | \
    PIN_PUPDR_FLOATING(1) | \
    PIN_PUPDR_FLOATING(2) | \
    PIN_PUPDR_FLOATING(3) | \
    PIN_PUPDR_FLOATING(4) | \
    PIN_PUPDR_FLOATING(5) | \
    PIN_PUPDR_FLOATING(6) | \
    PIN_PUPDR_FLOATING(7) | \
    PIN_PUPDR_FLOATING(8) | \
    PIN_PUPDR_FLOATING(9) | \
    PIN_PUPDR_FLOATING(10) | \
    PIN_PUPDR_FLOATING(11) | \
    PIN_PUPDR_FLOATING(12) | \
    PIN_PUPDR_FLOATING(13) | \
    PIN_PUPDR_FLOATING(14) | \
    PIN_PUPDR_FLOATING(15) | \
    0)

#define VAL_GPIOA_ODR ( \
    PIN_ODR_LOW(0) | \
    PIN_ODR_LOW(1) | \
    PIN_ODR_LOW(2) | \
    PIN_ODR_LOW(3) | \
    PIN_ODR_LOW(4) | \
    PIN_ODR_LOW(5) | \
    PIN_ODR_LOW(6) | \
    PIN_ODR_LOW(7) | \
    PIN_ODR_LOW(8) | \
    PIN_ODR_LOW(9) | \
    PIN_ODR_LOW(10) | \
    PIN_ODR_LOW(11) | \
    PIN_ODR_LOW(12) | \
    PIN_ODR_LOW(13) | \
    PIN_ODR_LOW(14) | \
    PIN_ODR_LOW(15) | \
    0)

#define VAL_GPIOA_AFRL ( \
    PIN_AFIO_AF(0, 0) | \
    PIN_AFIO_AF(1, 0) | \
    PIN_AFIO_AF(2, 0) | \
    PIN_AFIO_AF(3, 0) | \
    PIN_AFIO_AF(4, 0) | \
    PIN_AFIO_AF(5, 0) | \
    PIN_AFIO_AF(6, 0) | \
    PIN_AFIO_AF(7, 0) | \
    0)

#define VAL_GPIOA_AFRH ( \
    PIN_AFIO_AF(8, 1) | \
    PIN_AFIO_AF(9, 1) | \
    PIN_AFIO_AF(10, 1) | \
    PIN_AFIO_AF(11, 8) | \
    PIN_AFIO_AF(12, 8) | \
    PIN_AFIO_AF(13, 0) | \
    PIN_AFIO_AF(14, 0) | \
    PIN_AFIO_AF(15, 1) | \
    0)


/* PORT B */
#define VAL_GPIOB_MODER ( \
    PIN_MODE_ANALOG(0) | \
    PIN_MODE_OUTPUT(1) | \
    PIN_MODE_INPUT(2) | \
    PIN_MODE_ALTERNATE(3) | \
    PIN_MODE_ALTERNATE(4) | \
    PIN_MODE_ALTERNATE(5) | \
    PIN_MODE_ALTERNATE(6) | \
    PIN_MODE_ALTERNATE(7) | \
    PIN_MODE_ALTERNATE(8) | \
    PIN_MODE_ALTERNATE(9) | \
    PIN_MODE_INPUT(10) | \
    PIN_MODE_ANALOG(11) | \
    PIN_MODE_OUTPUT(12) | \
    PIN_MODE_INPUT(13) | \
    PIN_MODE_INPUT(14) | \
    PIN_MODE_INPUT(15) | \
    0)

#define VAL_GPIOB_OTYPER ( \
    PIN_OTYPE_PUSHPULL(0) | \
    PIN_OTYPE_PUSHPULL(1) | \
    PIN_OTYPE_PUSHPULL(2) | \
    PIN_OTYPE_PUSHPULL(3) | \
    PIN_OTYPE_PUSHPULL(4) | \
    PIN_OTYPE_PUSHPULL(5) | \
    PIN_OTYPE_PUSHPULL(6) | \
    PIN_OTYPE_PUSHPULL(7) | \
    PIN_OTYPE_OPENDRAIN(8) | \
    PIN_OTYPE_OPENDRAIN(9) | \
    PIN_OTYPE_PUSHPULL(10) | \
    PIN_OTYPE_PUSHPULL(11) | \
    PIN_OTYPE_PUSHPULL(12) | \
    PIN_OTYPE_PUSHPULL(13) | \
    PIN_OTYPE_PUSHPULL(14) | \
    PIN_OTYPE_PUSHPULL(15) | \
    0)

#define VAL_GPIOB_OSPEEDR ( \
    PIN_OSPEED_VERYLOW(0) | \
    PIN_OSPEED_MEDIUM(1) | \
    PIN_OSPEED_VERYLOW(2) | \
    PIN_OSPEED_MEDIUM(3) | \
    PIN_OSPEED_MEDIUM(4) | \
    PIN_OSPEED_MEDIUM(5) | \
    PIN_OSPEED_MEDIUM(6) | \
    PIN_OSPEED_MEDIUM(7) | \
    PIN_OSPEED_MEDIUM(8) | \
    PIN_OSPEED_MEDIUM(9) | \
    PIN_OSPEED_VERYLOW(10) | \
    PIN_OSPEED_VERYLOW(11) | \
    PIN_OSPEED_VERYLOW(12) | \
    PIN_OSPEED_VERYLOW(13) | \
    PIN_OSPEED_VERYLOW(14) | \
    PIN_OSPEED_VERYLOW(15) | \
    0)

#define VAL_GPIOB_PUPDR ( \
    PIN_PUPDR_FLOATING(0) | \
    PIN_PUPDR_FLOATING(1) | \
    PIN_PUPDR_PULLDOWN(2) | \
    PIN_PUPDR_FLOATING(3) | \
    PIN_PUPDR_PULLDOWN(4) | \
    PIN_PUPDR_PULLDOWN(5) | \
    PIN_PUPDR_FLOATING(6) | \
    PIN_PUPDR_FLOATING(7) | \
    PIN_PUPDR_FLOATING(8) | \
    PIN_PUPDR_FLOATING(9) | \
    PIN_PUPDR_PULLUP(10) | \
    PIN_PUPDR_FLOATING(11) | \
    PIN_PUPDR_FLOATING(12) | \
    PIN_PUPDR_PULLUP(13) | \
    PIN_PUPDR_PULLUP(14) | \
    PIN_PUPDR_PULLUP(15) | \
    0)

#define VAL_GPIOB_ODR ( \
    PIN_ODR_LOW(0) | \
    PIN_ODR_LOW(1) | \
    PIN_ODR_LOW(2) | \
    PIN_ODR_LOW(3) | \
    PIN_ODR_LOW(4) | \
    PIN_ODR_LOW(5) | \
    PIN_ODR_LOW(6) | \
    PIN_ODR_LOW(7) | \
    PIN_ODR_LOW(8) | \
    PIN_ODR_LOW(9) | \
    PIN_ODR_LOW(10) | \
    PIN_ODR_LOW(11) | \
    PIN_ODR_LOW(12) | \
    PIN_ODR_LOW(13) | \
    PIN_ODR_LOW(14) | \
    PIN_ODR_LOW(15) | \
    0)

#define VAL_GPIOB_AFRL ( \
    PIN_AFIO_AF(0, 0) | \
    PIN_AFIO_AF(1, 0) | \
    PIN_AFIO_AF(2, 0) | \
    PIN_AFIO_AF(3, 0) | \
    PIN_AFIO_AF(4, 2) | \
    PIN_AFIO_AF(5, 2) | \
    PIN_AFIO_AF(6, 7) | \
    PIN_AFIO_AF(7, 7) | \
    0)

#define VAL_GPIOB_AFRH ( \
    PIN_AFIO_AF(8, 4) | \
    PIN_AFIO_AF(9, 4) | \
    PIN_AFIO_AF(10, 0) | \
    PIN_AFIO_AF(11, 0) | \
    PIN_AFIO_AF(12, 0) | \
    PIN_AFIO_AF(13, 0) | \
    PIN_AFIO_AF(14, 0) | \
    PIN_AFIO_AF(15, 0) | \
    0)


/* PORT C */
#define VAL_GPIOC_MODER ( \
    PIN_MODE_ANALOG(0) | \
    PIN_MODE_ANALOG(1) | \
    PIN_MODE_ANALOG(2) | \
    PIN_MODE_ANALOG(3) | \
    PIN_MODE_ANALOG(4) | \
    PIN_MODE_ANALOG(5) | \
    PIN_MODE_ANALOG(6) | \
    PIN_MODE_ANALOG(7) | \
    PIN_MODE_ANALOG(8) | \
    PIN_MODE_ANALOG(9) | \
    PIN_MODE_ANALOG(10) | \
    PIN_MODE_ANALOG(11) | \
    PIN_MODE_ANALOG(12) | \
    PIN_MODE_OUTPUT(13) | \
    PIN_MODE_OUTPUT(14) | \
    PIN_MODE_OUTPUT(15) | \
    0)

#define VAL_GPIOC_OTYPER ( \
    PIN_OTYPE_PUSHPULL(0) | \
    PIN_OTYPE_PUSHPULL(1) | \
    PIN_OTYPE_PUSHPULL(2) | \
    PIN_OTYPE_PUSHPULL(3) | \
    PIN_OTYPE_PUSHPULL(4) | \
    PIN_OTYPE_PUSHPULL(5) | \
    PIN_OTYPE_PUSHPULL(6) | \
    PIN_OTYPE_PUSHPULL(7) | \
    PIN_OTYPE_PUSHPULL(8) | \
    PIN_OTYPE_PUSHPULL(9) | \
    PIN_OTYPE_PUSHPULL(10) | \
    PIN_OTYPE_PUSHPULL(11) | \
    PIN_OTYPE_PUSHPULL(12) | \
    PIN_OTYPE_PUSHPULL(13) | \
    PIN_OTYPE_PUSHPULL(14) | \
    PIN_OTYPE_PUSHPULL(15) | \
    0)

#define VAL_GPIOC_OSPEEDR ( \
    PIN_OSPEED_VERYLOW(0) | \
    PIN_OSPEED_VERYLOW(1) | \
    PIN_OSPEED_VERYLOW(2) | \
    PIN_OSPEED_VERYLOW(3) | \
    PIN_OSPEED_VERYLOW(4) | \
    PIN_OSPEED_VERYLOW(5) | \
    PIN_OSPEED_VERYLOW(6) | \
    PIN_OSPEED_VERYLOW(7) | \
    PIN_OSPEED_VERYLOW(8) | \
    PIN_OSPEED_VERYLOW(9) | \
    PIN_OSPEED_VERYLOW(10) | \
    PIN_OSPEED_VERYLOW(11) | \
    PIN_OSPEED_VERYLOW(12) | \
    PIN_OSPEED_VERYLOW(13) | \
    PIN_OSPEED_VERYLOW(14) | \
    PIN_OSPEED_VERYLOW(15) | \
    0)

#define VAL_GPIOC_PUPDR ( \
    PIN_PUPDR_FLOATING(0) | \
    PIN_PUPDR_FLOATING(1) | \
    PIN_PUPDR_FLOATING(2) | \
    PIN_PUPDR_FLOATING(3) | \
    PIN_PUPDR_FLOATING(4) | \
    PIN_PUPDR_FLOATING(5) | \
    PIN_PUPDR_FLOATING(6) | \
    PIN_PUPDR_FLOATING(7) | \
    PIN_PUPDR_FLOATING(8) | \
    PIN_PUPDR_FLOATING(9) | \
    PIN_PUPDR_FLOATING(10) | \
    PIN_PUPDR_FLOATING(11) | \
    PIN_PUPDR_FLOATING(12) | \
    PIN_PUPDR_FLOATING(13) | \
    PIN_PUPDR_FLOATING(14) | \
    PIN_PUPDR_FLOATING(15) | \
    0)

#define VAL_GPIOC_ODR ( \
    PIN_ODR_LOW(0) | \
    PIN_ODR_LOW(1) | \
    PIN_ODR_LOW(2) | \
    PIN_ODR_LOW(3) | \
    PIN_ODR_LOW(4) | \
    PIN_ODR_LOW(5) | \
    PIN_ODR_LOW(6) | \
    PIN_ODR_LOW(7) | \
    PIN_ODR_LOW(8) | \
    PIN_ODR_LOW(9) | \
    PIN_ODR_LOW(10) | \
    PIN_ODR_LOW(11) | \
    PIN_ODR_LOW(12) | \
    PIN_ODR_LOW(13) | \
    PIN_ODR_LOW(14) | \
    PIN_ODR_LOW(15) | \
    0)

#define VAL_GPIOC_AFRL ( \
    PIN_AFIO_AF(0, 0) | \
    PIN_AFIO_AF(1, 0) | \
    PIN_AFIO_AF(2, 0) | \
    PIN_AFIO_AF(3, 0) | \
    PIN_AFIO_AF(4, 0) | \
    PIN_AFIO_AF(5, 0) | \
    PIN_AFIO_AF(6, 0) | \
    PIN_AFIO_AF(7, 0) | \
    0)

#define VAL_GPIOC_AFRH ( \
    PIN_AFIO_AF(8, 0) | \
    PIN_AFIO_AF(9, 0) | \
    PIN_AFIO_AF(10, 0) | \
    PIN_AFIO_AF(11, 0) | \
    PIN_AFIO_AF(12, 0) | \
    PIN_AFIO_AF(13, 0) | \
    PIN_AFIO_AF(14, 0) | \
    PIN_AFIO_AF(15, 0) | \
    0)


/* PORT D */
#define VAL_GPIOD_MODER ( \
    PIN_MODE_ANALOG(0) | \
    PIN_MODE_ANALOG(1) | \
    PIN_MODE_ANALOG(2) | \
    PIN_MODE_ANALOG(3) | \
    PIN_MODE_ANALOG(4) | \
    PIN_MODE_ANALOG(5) | \
    PIN_MODE_ANALOG(6) | \
    PIN_MODE_ANALOG(7) | \
    PIN_MODE_ANALOG(8) | \
    PIN_MODE_ANALOG(9) | \
    PIN_MODE_ANALOG(10) | \
    PIN_MODE_ANALOG(11) | \
    PIN_MODE_ANALOG(12) | \
    PIN_MODE_ANALOG(13) | \
    PIN_MODE_ANALOG(14) | \
    PIN_MODE_ANALOG(15) | \
    0)

#define VAL_GPIOD_OTYPER ( \
    PIN_OTYPE_PUSHPULL(0) | \
    PIN_OTYPE_PUSHPULL(1) | \
    PIN_OTYPE_PUSHPULL(2) | \
    PIN_OTYPE_PUSHPULL(3) | \
    PIN_OTYPE_PUSHPULL(4) | \
    PIN_OTYPE_PUSHPULL(5) | \
    PIN_OTYPE_PUSHPULL(6) | \
    PIN_OTYPE_PUSHPULL(7) | \
    PIN_OTYPE_PUSHPULL(8) | \
    PIN_OTYPE_PUSHPULL(9) | \
    PIN_OTYPE_PUSHPULL(10) | \
    PIN_OTYPE_PUSHPULL(11) | \
    PIN_OTYPE_PUSHPULL(12) | \
    PIN_OTYPE_PUSHPULL(13) | \
    PIN_OTYPE_PUSHPULL(14) | \
    PIN_OTYPE_PUSHPULL(15) | \
    0)

#define VAL_GPIOD_OSPEEDR ( \
    PIN_OSPEED_VERYLOW(0) | \
    PIN_OSPEED_VERYLOW(1) | \
    PIN_OSPEED_VERYLOW(2) | \
    PIN_OSPEED_VERYLOW(3) | \
    PIN_OSPEED_VERYLOW(4) | \
    PIN_OSPEED_VERYLOW(5) | \
    PIN_OSPEED_VERYLOW(6) | \
    PIN_OSPEED_VERYLOW(7) | \
    PIN_OSPEED_VERYLOW(8) | \
    PIN_OSPEED_VERYLOW(9) | \
    PIN_OSPEED_VERYLOW(10) | \
    PIN_OSPEED_VERYLOW(11) | \
    PIN_OSPEED_VERYLOW(12) | \
    PIN_OSPEED_VERYLOW(13) | \
    PIN_OSPEED_VERYLOW(14) | \
    PIN_OSPEED_VERYLOW(15) | \
    0)

#define VAL_GPIOD_PUPDR ( \
    PIN_PUPDR_FLOATING(0) | \
    PIN_PUPDR_FLOATING(1) | \
    PIN_PUPDR_FLOATING(2) | \
    PIN_PUPDR_FLOATING(3) | \
    PIN_PUPDR_FLOATING(4) | \
    PIN_PUPDR_FLOATING(5) | \
    PIN_PUPDR_FLOATING(6) | \
    PIN_PUPDR_FLOATING(7) | \
    PIN_PUPDR_FLOATING(8) | \
    PIN_PUPDR_FLOATING(9) | \
    PIN_PUPDR_FLOATING(10) | \
    PIN_PUPDR_FLOATING(11) | \
    PIN_PUPDR_FLOATING(12) | \
    PIN_PUPDR_FLOATING(13) | \
    PIN_PUPDR_FLOATING(14) | \
    PIN_PUPDR_FLOATING(15) | \
    0)

#define VAL_GPIOD_ODR ( \
    PIN_ODR_LOW(0) | \
    PIN_ODR_LOW(1) | \
    PIN_ODR_LOW(2) | \
    PIN_ODR_LOW(3) | \
    PIN_ODR_LOW(4) | \
    PIN_ODR_LOW(5) | \
    PIN_ODR_LOW(6) | \
    PIN_ODR_LOW(7) | \
    PIN_ODR_LOW(8) | \
    PIN_ODR_LOW(9) | \
    PIN_ODR_LOW(10) | \
    PIN_ODR_LOW(11) | \
    PIN_ODR_LOW(12) | \
    PIN_ODR_LOW(13) | \
    PIN_ODR_LOW(14) | \
    PIN_ODR_LOW(15) | \
    0)

#define VAL_GPIOD_AFRL ( \
    PIN_AFIO_AF(0, 0) | \
    PIN_AFIO_AF(1, 0) | \
    PIN_AFIO_AF(2, 0) | \
    PIN_AFIO_AF(3, 0) | \
    PIN_AFIO_AF(4, 0) | \
    PIN_AFIO_AF(5, 0) | \
    PIN_AFIO_AF(6, 0) | \
    PIN_AFIO_AF(7, 0) | \
    0)

#define VAL_GPIOD_AFRH ( \
    PIN_AFIO_AF(8, 0) | \
    PIN_AFIO_AF(9, 0) | \
    PIN_AFIO_AF(10, 0) | \
    PIN_AFIO_AF(11, 0) | \
    PIN_AFIO_AF(12, 0) | \
    PIN_AFIO_AF(13, 0) | \
    PIN_AFIO_AF(14, 0) | \
    PIN_AFIO_AF(15, 0) | \
    0)


/* PORT E */
#define VAL_GPIOE_MODER ( \
    PIN_MODE_ANALOG(0) | \
    PIN_MODE_ANALOG(1) | \
    PIN_MODE_ANALOG(2) | \
    PIN_MODE_ANALOG(3) | \
    PIN_MODE_ANALOG(4) | \
    PIN_MODE_ANALOG(5) | \
    PIN_MODE_ANALOG(6) | \
    PIN_MODE_ANALOG(7) | \
    PIN_MODE_ANALOG(8) | \
    PIN_MODE_ANALOG(9) | \
    PIN_MODE_ANALOG(10) | \
    PIN_MODE_ANALOG(11) | \
    PIN_MODE_ANALOG(12) | \
    PIN_MODE_ANALOG(13) | \
    PIN_MODE_ANALOG(14) | \
    PIN_MODE_ANALOG(15) | \
    0)

#define VAL_GPIOE_OTYPER ( \
    PIN_OTYPE_PUSHPULL(0) | \
    PIN_OTYPE_PUSHPULL(1) | \
    PIN_OTYPE_PUSHPULL(2) | \
    PIN_OTYPE_PUSHPULL(3) | \
    PIN_OTYPE_PUSHPULL(4) | \
    PIN_OTYPE_PUSHPULL(5) | \
    PIN_OTYPE_PUSHPULL(6) | \
    PIN_OTYPE_PUSHPULL(7) | \
    PIN_OTYPE_PUSHPULL(8) | \
    PIN_OTYPE_PUSHPULL(9) | \
    PIN_OTYPE_PUSHPULL(10) | \
    PIN_OTYPE_PUSHPULL(11) | \
    PIN_OTYPE_PUSHPULL(12) | \
    PIN_OTYPE_PUSHPULL(13) | \
    PIN_OTYPE_PUSHPULL(14) | \
    PIN_OTYPE_PUSHPULL(15) | \
    0)

#define VAL_GPIOE_OSPEEDR ( \
    PIN_OSPEED_VERYLOW(0) | \
    PIN_OSPEED_VERYLOW(1) | \
    PIN_OSPEED_VERYLOW(2) | \
    PIN_OSPEED_VERYLOW(3) | \
    PIN_OSPEED_VERYLOW(4) | \
    PIN_OSPEED_VERYLOW(5) | \
    PIN_OSPEED_VERYLOW(6) | \
    PIN_OSPEED_VERYLOW(7) | \
    PIN_OSPEED_VERYLOW(8) | \
    PIN_OSPEED_VERYLOW(9) | \
    PIN_OSPEED_VERYLOW(10) | \
    PIN_OSPEED_VERYLOW(11) | \
    PIN_OSPEED_VERYLOW(12) | \
    PIN_OSPEED_VERYLOW(13) | \
    PIN_OSPEED_VERYLOW(14) | \
    PIN_OSPEED_VERYLOW(15) | \
    0)

#define VAL_GPIOE_PUPDR ( \
    PIN_PUPDR_FLOATING(0) | \
    PIN_PUPDR_FLOATING(1) | \
    PIN_PUPDR_FLOATING(2) | \
    PIN_PUPDR_FLOATING(3) | \
    PIN_PUPDR_FLOATING(4) | \
    PIN_PUPDR_FLOATING(5) | \
    PIN_PUPDR_FLOATING(6) | \
    PIN_PUPDR_FLOATING(7) | \
    PIN_PUPDR_FLOATING(8) | \
    PIN_PUPDR_FLOATING(9) | \
    PIN_PUPDR_FLOATING(10) | \
    PIN_PUPDR_FLOATING(11) | \
    PIN_PUPDR_FLOATING(12) | \
    PIN_PUPDR_FLOATING(13) | \
    PIN_PUPDR_FLOATING(14) | \
    PIN_PUPDR_FLOATING(15) | \
    0)

#define VAL_GPIOE_ODR ( \
    PIN_ODR_LOW(0) | \
    PIN_ODR_LOW(1) | \
    PIN_ODR_LOW(2) | \
    PIN_ODR_LOW(3) | \
    PIN_ODR_LOW(4) | \
    PIN_ODR_LOW(5) | \
    PIN_ODR_LOW(6) | \
    PIN_ODR_LOW(7) | \
    PIN_ODR_LOW(8) | \
    PIN_ODR_LOW(9) | \
    PIN_ODR_LOW(10) | \
    PIN_ODR_LOW(11) | \
    PIN_ODR_LOW(12) | \
    PIN_ODR_LOW(13) | \
    PIN_ODR_LOW(14) | \
    PIN_ODR_LOW(15) | \
    0)

#define VAL_GPIOE_AFRL ( \
    PIN_AFIO_AF(0, 0) | \
    PIN_AFIO_AF(1, 0) | \
    PIN_AFIO_AF(2, 0) | \
    PIN_AFIO_AF(3, 0) | \
    PIN_AFIO_AF(4, 0) | \
    PIN_AFIO_AF(5, 0) | \
    PIN_AFIO_AF(6, 0) | \
    PIN_AFIO_AF(7, 0) | \
    0)

#define VAL_GPIOE_AFRH ( \
    PIN_AFIO_AF(8, 0) | \
    PIN_AFIO_AF(9, 0) | \
    PIN_AFIO_AF(10, 0) | \
    PIN_AFIO_AF(11, 0) | \
    PIN_AFIO_AF(12, 0) | \
    PIN_AFIO_AF(13, 0) | \
    PIN_AFIO_AF(14, 0) | \
    PIN_AFIO_AF(15, 0) | \
    0)


/* PORT H */
#define VAL_GPIOH_MODER ( \
    PIN_MODE_ANALOG(0) | \
    PIN_MODE_ANALOG(1) | \
    PIN_MODE_ANALOG(2) | \
    PIN_MODE_ANALOG(3) | \
    PIN_MODE_ANALOG(4) | \
    PIN_MODE_ANALOG(5) | \
    PIN_MODE_ANALOG(6) | \
    PIN_MODE_ANALOG(7) | \
    PIN_MODE_ANALOG(8) | \
    PIN_MODE_ANALOG(9) | \
    PIN_MODE_ANALOG(10) | \
    PIN_MODE_ANALOG(11) | \
    PIN_MODE_ANALOG(12) | \
    PIN_MODE_ANALOG(13) | \
    PIN_MODE_ANALOG(14) | \
    PIN_MODE_ANALOG(15) | \
    0)

#define VAL_GPIOH_OTYPER ( \
    PIN_OTYPE_PUSHPULL(0) | \
    PIN_OTYPE_PUSHPULL(1) | \
    PIN_OTYPE_PUSHPULL(2) | \
    PIN_OTYPE_PUSHPULL(3) | \
    PIN_OTYPE_PUSHPULL(4) | \
    PIN_OTYPE_PUSHPULL(5) | \
    PIN_OTYPE_PUSHPULL(6) | \
    PIN_OTYPE_PUSHPULL(7) | \
    PIN_OTYPE_PUSHPULL(8) | \
    PIN_OTYPE_PUSHPULL(9) | \
    PIN_OTYPE_PUSHPULL(10) | \
    PIN_OTYPE_PUSHPULL(11) | \
    PIN_OTYPE_PUSHPULL(12) | \
    PIN_OTYPE_PUSHPULL(13) | \
    PIN_OTYPE_PUSHPULL(14) | \
    PIN_OTYPE_PUSHPULL(15) | \
    0)

#define VAL_GPIOH_OSPEEDR ( \
    PIN_OSPEED_VERYLOW(0) | \
    PIN_OSPEED_VERYLOW(1) | \
    PIN_OSPEED_VERYLOW(2) | \
    PIN_OSPEED_VERYLOW(3) | \
    PIN_OSPEED_VERYLOW(4) | \
    PIN_OSPEED_VERYLOW(5) | \
    PIN_OSPEED_VERYLOW(6) | \
    PIN_OSPEED_VERYLOW(7) | \
    PIN_OSPEED_VERYLOW(8) | \
    PIN_OSPEED_VERYLOW(9) | \
    PIN_OSPEED_VERYLOW(10) | \
    PIN_OSPEED_VERYLOW(11) | \
    PIN_OSPEED_VERYLOW(12) | \
    PIN_OSPEED_VERYLOW(13) | \
    PIN_OSPEED_VERYLOW(14) | \
    PIN_OSPEED_VERYLOW(15) | \
    0)

#define VAL_GPIOH_PUPDR ( \
    PIN_PUPDR_FLOATING(0) | \
    PIN_PUPDR_FLOATING(1) | \
    PIN_PUPDR_FLOATING(2) | \
    PIN_PUPDR_FLOATING(3) | \
    PIN_PUPDR_FLOATING(4) | \
    PIN_PUPDR_FLOATING(5) | \
    PIN_PUPDR_FLOATING(6) | \
    PIN_PUPDR_FLOATING(7) | \
    PIN_PUPDR_FLOATING(8) | \
    PIN_PUPDR_FLOATING(9) | \
    PIN_PUPDR_FLOATING(10) | \
    PIN_PUPDR_FLOATING(11) | \
    PIN_PUPDR_FLOATING(12) | \
    PIN_PUPDR_FLOATING(13) | \
    PIN_PUPDR_FLOATING(14) | \
    PIN_PUPDR_FLOATING(15) | \
    0)

#define VAL_GPIOH_ODR ( \
    PIN_ODR_LOW(0) | \
    PIN_ODR_LOW(1) | \
    PIN_ODR_LOW(2) | \
    PIN_ODR_LOW(3) | \
    PIN_ODR_LOW(4) | \
    PIN_ODR_LOW(5) | \
    PIN_ODR_LOW(6) | \
    PIN_ODR_LOW(7) | \
    PIN_ODR_LOW(8) | \
    PIN_ODR_LOW(9) | \
    PIN_ODR_LOW(10) | \
    PIN_ODR_LOW(11) | \
    PIN_ODR_LOW(12) | \
    PIN_ODR_LOW(13) | \
    PIN_ODR_LOW(14) | \
    PIN_ODR_LOW(15) | \
    0)

#define VAL_GPIOH_AFRL ( \
    PIN_AFIO_AF(0, 0) | \
    PIN_AFIO_AF(1, 0) | \
    PIN_AFIO_AF(2, 0) | \
    PIN_AFIO_AF(3, 0) | \
    PIN_AFIO_AF(4, 0) | \
    PIN_AFIO_AF(5, 0) | \
    PIN_AFIO_AF(6, 0) | \
    PIN_AFIO_AF(7, 0) | \
    0)

#define VAL_GPIOH_AFRH ( \
    PIN_AFIO_AF(8, 0) | \
    PIN_AFIO_AF(9, 0) | \
    PIN_AFIO_AF(10, 0) | \
    PIN_AFIO_AF(11, 0) | \
    PIN_AFIO_AF(12, 0) | \
    PIN_AFIO_AF(13, 0) | \
    PIN_AFIO_AF(14, 0) | \
    PIN_AFIO_AF(15, 0) | \
    0)


/* PORT I */
#define VAL_GPIOI_MODER ( \
    PIN_MODE_ANALOG(0) | \
    PIN_MODE_ANALOG(1) | \
    PIN_MODE_ANALOG(2) | \
    PIN_MODE_ANALOG(3) | \
    PIN_MODE_ANALOG(4) | \
    PIN_MODE_ANALOG(5) | \
    PIN_MODE_ANALOG(6) | \
    PIN_MODE_ANALOG(7) | \
    PIN_MODE_ANALOG(8) | \
    PIN_MODE_ANALOG(9) | \
    PIN_MODE_ANALOG(10) | \
    PIN_MODE_ANALOG(11) | \
    PIN_MODE_ANALOG(12) | \
    PIN_MODE_ANALOG(13) | \
    PIN_MODE_ANALOG(14) | \
    PIN_MODE_ANALOG(15) | \
    0)

#define VAL_GPIOI_OTYPER ( \
    PIN_OTYPE_PUSHPULL(0) | \
    PIN_OTYPE_PUSHPULL(1) | \
    PIN_OTYPE_PUSHPULL(2) | \
    PIN_OTYPE_PUSHPULL(3) | \
    PIN_OTYPE_PUSHPULL(4) | \
    PIN_OTYPE_PUSHPULL(5) | \
    PIN_OTYPE_PUSHPULL(6) | \
    PIN_OTYPE_PUSHPULL(7) | \
    PIN_OTYPE_PUSHPULL(8) | \
    PIN_OTYPE_PUSHPULL(9) | \
    PIN_OTYPE_PUSHPULL(10) | \
    PIN_OTYPE_PUSHPULL(11) | \
    PIN_OTYPE_PUSHPULL(12) | \
    PIN_OTYPE_PUSHPULL(13) | \
    PIN_OTYPE_PUSHPULL(14) | \
    PIN_OTYPE_PUSHPULL(15) | \
    0)

#define VAL_GPIOI_OSPEEDR ( \
    PIN_OSPEED_VERYLOW(0) | \
    PIN_OSPEED_VERYLOW(1) | \
    PIN_OSPEED_VERYLOW(2) | \
    PIN_OSPEED_VERYLOW(3) | \
    PIN_OSPEED_VERYLOW(4) | \
    PIN_OSPEED_VERYLOW(5) | \
    PIN_OSPEED_VERYLOW(6) | \
    PIN_OSPEED_VERYLOW(7) | \
    PIN_OSPEED_VERYLOW(8) | \
    PIN_OSPEED_VERYLOW(9) | \
    PIN_OSPEED_VERYLOW(10) | \
    PIN_OSPEED_VERYLOW(11) | \
    PIN_OSPEED_VERYLOW(12) | \
    PIN_OSPEED_VERYLOW(13) | \
    PIN_OSPEED_VERYLOW(14) | \
    PIN_OSPEED_VERYLOW(15) | \
    0)

#define VAL_GPIOI_PUPDR ( \
    PIN_PUPDR_FLOATING(0) | \
    PIN_PUPDR_FLOATING(1) | \
    PIN_PUPDR_FLOATING(2) | \
    PIN_PUPDR_FLOATING(3) | \
    PIN_PUPDR_FLOATING(4) | \
    PIN_PUPDR_FLOATING(5) | \
    PIN_PUPDR_FLOATING(6) | \
    PIN_PUPDR_FLOATING(7) | \
    PIN_PUPDR_FLOATING(8) | \
    PIN_PUPDR_FLOATING(9) | \
    PIN_PUPDR_FLOATING(10) | \
    PIN_PUPDR_FLOATING(11) | \
    PIN_PUPDR_FLOATING(12) | \
    PIN_PUPDR_FLOATING(13) | \
    PIN_PUPDR_FLOATING(14) | \
    PIN_PUPDR_FLOATING(15) | \
    0)

#define VAL_GPIOI_ODR ( \
    PIN_ODR_LOW(0) | \
    PIN_ODR_LOW(1) | \
    PIN_ODR_LOW(2) | \
    PIN_ODR_LOW(3) | \
    PIN_ODR_LOW(4) | \
    PIN_ODR_LOW(5) | \
    PIN_ODR_LOW(6) | \
    PIN_ODR_LOW(7) | \
    PIN_ODR_LOW(8) | \
    PIN_ODR_LOW(9) | \
    PIN_ODR_LOW(10) | \
    PIN_ODR_LOW(11) | \
    PIN_ODR_LOW(12) | \
    PIN_ODR_LOW(13) | \
    PIN_ODR_LOW(14) | \
    PIN_ODR_LOW(15) | \
    0)

#define VAL_GPIOI_AFRL ( \
    PIN_AFIO_AF(0, 0) | \
    PIN_AFIO_AF(1, 0) | \
    PIN_AFIO_AF(2, 0) | \
    PIN_AFIO_AF(3, 0) | \
    PIN_AFIO_AF(4, 0) | \
    PIN_AFIO_AF(5, 0) | \
    PIN_AFIO_AF(6, 0) | \
    PIN_AFIO_AF(7, 0) | \
    0)

#define VAL_GPIOI_AFRH ( \
    PIN_AFIO_AF(8, 0) | \
    PIN_AFIO_AF(9, 0) | \
    PIN_AFIO_AF(10, 0) | \
    PIN_AFIO_AF(11, 0) | \
    PIN_AFIO_AF(12, 0) | \
    PIN_AFIO_AF(13, 0) | \
    PIN_AFIO_AF(14, 0) | \
    PIN_AFIO_AF(15, 0) | \
    0)


/*===========================================================================*/
/* External declarations.                                                    */
/*===========================================================================*/

#if !defined(_FROM_ASM_)
#ifdef __cplusplus
extern "C" {
#endif
  void boardInit(void);
#ifdef __cplusplus
}
#endif
#endif /* _FROM_ASM_ */

#endif /* BOARD_H */

// clang-format on
